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dtmf.arc
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DTMF05.ASM
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Assembly Source File
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1990-01-08
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5KB
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192 lines
* File: DTMF.ASM
* Driver routines for 68HC05 to produce DTMF tones in software
* this version uses a fixed 256 byte sine table, and a fixed 128 us sample time
* this allows operation under interrupt control
* hardware requirements: 8 bit DAC on port a of 68HC05
* To use, do a JSR to DTINIT to set up timer
* then do a JSR to location DTMF with the digit in the lower nibble of
* Accumulator A
* digit values: 0-9, 10 = #, 11 = *, 12-15 represent a through d
* A 60 ms tone burst will be generated, followed by 60 ms of silence
* The location TTIME may be altered to change this timing
opt mul allow multiply instruction
asct
* define test to be non-zero to create test version
test equ 1
* First a few definitions
deftt equ 60 default tone time (60 ms)
dac equ $0 DAC output on port a
dacddr equ $4 data direction register for port with DAC
portb equ 1 port b address
ddrb equ 5 ... and its ddr
ctrhi equ $18 timer free running counter
ctrlo equ $19
ocrhi equ $16 output compare register
ocrlo equ $17
tcr equ $12 timer control register
ocie equ $40 output compare interrupt enable
tsr equ $13 timer status register
ocf equ 6 output compare flag bit position
intcnt equ 128/2 count to load into output compare
row1 equ 23 row intervals
row2 equ 25
row3 equ 28
row4 equ 31
col1 equ 40 column intervals
col2 equ 44
col3 equ 48
col4 equ 54
org $50 RAM scratchpad - move this to fit your system
ttime rmb 1 tone time in milliseconds
ttctr rmb 2 time counter
ttsave rmb 2 save the count value for interdigit pause
ttflag rmb 1 non zero means generate tones
rowptr rmb 1 next row sample to load
colptr rmb 1 ditto for columns
rowint rmb 1 row interval - added to row counter each sample
colint rmb 1 ditto for column
sample rmb 1 temp storage for sample
org $1000
dtinit sei disable interrupts
ifne test
rsp set default stack
endc
lda #deftt set up time counter
sta ttime
lda #$ff set up ddr - all outputs
sta dacddr
ifne test
sta ddrb set up port b to flag entry to interrupt
clr portb
endc
lda #$80 set dac to halfway point
sta dac
clr ttflag no tones please
lda #ocie enable output compare interrupt
sta tcr
lda ctrhi freeze counter
sta ocrhi
lda ctrlo
add #intcnt
bcc dti1
inc ocrhi
dti1 tst tsr
sta ocrlo
cli
ifeq test
rts done for now
endc
ifne test
nop
here bra here endless loop
endc
dtmf and #$0f clear out junk
tax get row interval
lda rowtab,x
sta rowint
lda coltab,x and column
sta colint
clr rowptr start at 0
clr colptr
lda ttime start tone - set time
ldx #250 adjust for # of samples in (ttime) msec
mul (125/128) * ttime * 8
clra x now contains adjusted sample count
aslx multiply by 8 to produce sample count
rola
aslx
rola
aslx
rola
coma
negx negate so tisr can increment
bcs dtmf05 carry if necessary
inca
dtmf05 sta ttctr put into timer
stx ttctr+1
sta ttsave save for pause time
stx ttsave+1
inc ttflag start tones
dtmf1 brset 0,ttflag,dtmf1 loop till tone complete
lda ttsave now do pause
sta ttctr
lda ttsave+1
sta ttctr+1
clr rowint do the pause by not moving pointers
clr colint
inc ttflag start pause
dtmf2 brset 0,ttflag,dtmf2
rts done
* timer interrupt service routine
* if ttctr != 0, then output next sample to dac
tisr ifne test
bset 0,portb
endc
lda ocrlo (3) add timer count
add #intcnt (2)
bcc tisr2 (3) do carry if needed
inc ocrhi (5)
tisr2 tst tsr (4) clear flag
sta ocrlo (4)
brclr 0,ttflag,tisr1 (5) don't generate tone if flag cleared
ldx rowptr (3) get next row sample
lda sine,x (5)
sta sample (4)
txa (2) update pointer
add rowint (3)
sta rowptr (4)
ldx colptr (3) get next col sample
lda sine,x (5)
asra (3) divide by 4
asra (3) divide by 4
add sine,x (5) now have 1.25 * column sample
add sample (3) add to row sample
eor #$80 (2) fix sign bit
sta dac (4) out it goes
txa (2) update pointer
add colint (3)
sta colptr (4)
inc ttctr+1 (5) increment timer
bne tisr1 (3) carry needed?
inc ttctr (5) yes - do it
bne tisr1 (3) overflow?
clr ttflag yes - turn off tones
tisr1 ifne test
bclr 0,portb
endc
rti (9)
* (7) interrupt response
* ===
* 116 cycles when generating tones
* total overhead at 2 MHz E clock = 116/256 == 45%
coltab fcb col2,col1,col2,col3 0,1,2,3
fcb col1,col2,col3 4,5,6
fcb col1,col2,col3 7,8,9
fcb col1,col3 #,*
fcb col4,col4,col4,col4 a,b,c,d
rowtab fcb row4,row1,row1,row1 0,1,2,3
fcb row2,row2,row2 4,5,6
fcb row3,row3,row3 7,8,9
fcb row4,row4 #,*
fcb row1,row2,row3,row4 a,b,c,d
include sine56.asm
end